Cache Coherence

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Cache coherence is a challenge in multicore processors, with false sharing and similar problems generating high penalties. In my work, I profiled and analysed these misses on SPEC CPU 2006 benchmark suite. Using SESC (developed by i -acoma group of UIUC), I was able to justify the misses in the benchmarks.

For the project report, please don’t hesitate to send me an email!

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